Sri Madugula Murali Krishna
Assistant Professor, Electrical electronics and communication engineering, GST, VSP
Additional roles
- Assistant director - academics - Principals office, GST, VSP.
Education
M. Tech.Email ID
mmadugul@gitam.eduEducation
M. Tech.Education
Degree Name | Institute & College name | Year of Graduation/Award |
---|---|---|
M.Tech. | CDAC Noida | 2007 |
M.Sc. | Andhra University | 2001 |
Experience
Designation | Organization | From Date | To Date |
---|---|---|---|
ENGINEER | DEEPTI COMMUNICATIONS | 01-02-2002 | 31-05-2004 |
Analysis of Efficient Adiabatic Logic Circuits and Their Power Extraction in Finfet (10nm) and Comparison With 90nm and 45nmInternational Journal for Research in Applied Science & Engineering Technology, Others, -2017, 5, 1773-1779
Design of Logic Gates Using CNTFETsInternational Journal of Engineering and Applied Sciences, Others, -2015, 2, 110-113
Sub Thershold Design using SCL for low Power ApplicationInternational Journal for Recent Advances in Engineering & Technology, Others, -2014, 2, 76-80
SUBTHRESHOLD CIRCUIT DESIGN FOR HIGHPERFORMANCEInternational Journal of VLSI and Embedded Systems, EBSCO Host, -2014, 05, 970-975
Constraint Length Parametrizable Viterbi Decoder for Convolutional CodesInternational Journal of Engineering Research and Development, Others, -2012, 1, 37-41
Design of high speed low power differential dynamic like static CMOS circuit familiesInternational Journal Information and Communication Technology, Others, -2011, 3, 370-378
An Efficient Implementation of Multiplexer Based Flip Flop in Subthreshold RegionInternational Journal of Computer Communication and Information System, Others, -2010, 2, 34-38
Title | Type | Organized by | Venue | Start date | End date | Role |
---|---|---|---|---|---|---|
Modeling, Simulation and Charcterization of Nano Transistors | Quality improvement program | IIT Kanpur | IIT Kanpur | 26-Oct-2015 | 30-Oct-2015 | Participated |
Matlab & Simulink for Engineering Education | Training of tutors | MathWorks India Pvt. Ltd. | Fortune Hotel Visakhapatnam | 26-Feb-2015 | 26-Feb-2015 | Participated |
Research & Methodologies in Electrical Engineering | Training of tutors | IIT Hyderabad | IIT Hyderabad | 11-Dec-2014 | 12-Jun-2014 | Participated |
Applications of Nano Technology | Faculty development program | GITAM University | GITAM University | 06-Aug-2014 | 13-Jun-2014 | Participated |
Challenges and Opportunities in VLSI Design and Technology | Quality improvement program | National Institute of Technology, Hamirpur | National Institute of Technology, Hamirpur | 23-Jun-2014 | 27-Jun-2014 | Participated |
Low Power VLSI Design Using Cadence Tools | Faculty development program | VIT Chennai | Vellore Institute of Technology | 24-Jan-2013 | 25-Jan-2013 | Participated |
Instructional Design and Delivery System | Quality improvement program | National Institute of Technical Teachers Training & Research | GITAM University | 15-Dec-2008 | 20-Dec-2008 | Participated |
Title | Type | Organized by | Venue | Start date | End date | Role |
---|
Title of the lecture | Name of the college / university | Place | Date |
---|---|---|---|
VLSI Design Nanometer Scale | Columbia Institute of Engineering & Technology | Raipur | 25-Oct-2013 |
Latest Trends in VLSI Design | Columbia Institute of Engineering and Technology | Raipur | 23/10/2013 |
High Speed Circuit Design | GITAM Institute of Technology | Visakhapatnam | 07/02/2014 |