Murali Krishna M.

Murali Krishna M.

Assistant Professor,Asst. Director, Electrical Electronics and Communication Engineering, GST , VSP

M. Tech.
Email ID
M. Tech.


Degree NameInstitute & College nameYear of Graduation/Award
M.Tech.CDAC Noida2007
M.Sc.Andhra University2001


DesignationOrganizationFrom DateTo Date

Analysis of Efficient Adiabatic Logic Circuits and Their Power Extraction in Finfet (10nm) and Comparison With 90nm and 45nmInternational Journal for Research in Applied Science & Engineering Technology, Others, -2017, 5, 1773-1779

Design of Logic Gates Using CNTFETsInternational Journal of Engineering and Applied Sciences, Others, -2015, 2, 110-113

Sub Thershold Design using SCL for low Power ApplicationInternational Journal for Recent Advances in Engineering & Technology, Others, -2014, 2, 76-80

SUBTHRESHOLD CIRCUIT DESIGN FOR HIGHPERFORMANCEInternational Journal of VLSI and Embedded Systems, EBSCO Host, -2014, 05, 970-975

Constraint Length Parametrizable Viterbi Decoder for Convolutional CodesInternational Journal of Engineering Research and Development, Others, -2012, 1, 37-41

Design of high speed low power differential dynamic like static CMOS circuit familiesInternational Journal Information and Communication Technology, Others, -2011, 3, 370-378

An Efficient Implementation of Multiplexer Based Flip Flop in Subthreshold RegionInternational Journal of Computer Communication and Information System, Others, -2010, 2, 34-38

TitleTypeOrganized byVenueStart dateEnd dateRole
Modeling, Simulation and Charcterization of Nano TransistorsQuality improvement programIIT KanpurIIT Kanpur26-Oct-201530-Oct-2015Participated
Matlab & Simulink for Engineering EducationTraining of tutorsMathWorks India Pvt. Ltd.Fortune Hotel Visakhapatnam26-Feb-201526-Feb-2015Participated
Research & Methodologies in Electrical EngineeringTraining of tutorsIIT HyderabadIIT Hyderabad11-Dec-201412-Jun-2014Participated
Applications of Nano TechnologyFaculty development programGITAM UniversityGITAM University06-Aug-201413-Jun-2014Participated
Challenges and Opportunities in VLSI Design and TechnologyQuality improvement programNational Institute of Technology, HamirpurNational Institute of Technology, Hamirpur23-Jun-201427-Jun-2014Participated
Low Power VLSI Design Using Cadence ToolsFaculty development programVIT ChennaiVellore Institute of Technology24-Jan-201325-Jan-2013Participated
Instructional Design and Delivery SystemQuality improvement programNational Institute of Technical Teachers Training & ResearchGITAM University15-Dec-200820-Dec-2008Participated
TitleTypeOrganized byVenueStart dateEnd dateRole
Title of the lectureName of the college / universityPlaceDate
VLSI Design Nanometer ScaleColumbia Institute of Engineering & TechnologyRaipur25-Oct-2013
Latest Trends in VLSI DesignColumbia Institute of Engineering and TechnologyRaipur23/10/2013
High Speed Circuit DesignGITAM Institute of TechnologyVisakhapatnam07/02/2014