V. N. Madhavi Latha  M.

V. N. Madhavi Latha M.

Assistant Professor, Electrical Electronics and Communication Engineering, GST , HYD

Education
M. Tech.
Email ID
mmangara@gitam.edu
Education
M. Tech.

Education

Degree Name Institute & College name Year of Graduation/Award
Design of Reconfigurable multipliers for various applications Visweswaraya Technological University 2023
M.Tech CVR College of Engineering 2009
B.Tech Narasaraopeta Engineering College 2004

Experience

Designation Organization From Date To Date
Assistant Professor CVR college of Engineering 01-06-2006 31-12-2010
Assistant Professor P.Indrareddy M Engineering college 01-07-2005 31-05-2006
Lecturer Narasaraopeta Engineering College 01-09-2004 31-05-2005

Awards

Award name Award Organization Awarded year
Class topper in M.Tech CVR College of Engineering 2009

RNSToBinary Converters for a ThreeModuli Set{2n11, 2n1, 2nk}IETE Journal , Scopus, -2017, 58, 20-28

RNS to Bnary converter for a three moduli set { 2^(n1)1,2^n1,2^(nk)}IETE Journal , Others, -2017, 58, 20-28

Design of Reconfigurable Multipliers based on high speed shannon addersIJERT, Others, -2012, 1, 1-6

Seminar name Organized by Venue Start date End date Title of the paper presented Role Co presenter
Seminar name Organized by Venue Start date End date Title of the paper presented Role Co presenter
International IEEE CAS Bangkok 11-Nov-2019 14-Nov-2019 Residue to Binary converters for the seven moduliset Participated no
International IIIT Banglore IIIT Benguluru 21-Sep-2018 23-Sep-2018 Residue to binary converter for three moduli set Participated no
International IEEE CAS Pullman Kuala Lumpur Bangsar Hotel 31-Oct-2017 02-Nov-2017 An Efficient ResiduetoBinary converter for the moduli set {2n1 1, 2nk , 2n 1} Participated no
International IEEE CAS BITS Hyderabad 06-Dec-2012 07-Dec-2012 Efficient Channel Estimation Technique for LTE Air Interface Participated no
International NIT Rourkela(Computerscience department) NIT Rourkela 06-Oct-2012 08-Oct-2012 Analysis of Reconfigurable Multipliers for Integer and Galois Field Multiplication Based on High Speed Adders Participated no