The objective of this FDP is to train the participants with VLSI design backend flow through the open-source VLSI design tool “OpenROAD”. After successful completion of this FDP, the participants would be able to run the RTL synthesis to GDS-2 flow for their own design.
ICT 431
Visakhapatnam
09-02-2025
21-02-2025
Sri Chukka Raja Sekhar